System for regulating data transfer operations

Details System for regulating data transfer operations System for regulating data transfer operations

1985-08-12

1987-02-17

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 900

Patent

active

046444637

ABSTRACT:
A peripheral-controller (called a Data Link Processor) optimizes the rate of data transfers between a host computer and magnetic tape peripherals by use of a block counter sensing system for monitoring the occupation-status of word-blocks in a buffer memory. The peripheral-controller provides Automatic Read/Write Logic for buffer-peripheral tape transfers and a burst mode routine for rapid host-buffer transfers of data words. The sensing system provides means to inform a microcode sequencer when certain action routines should be executed in order to maintain steady error-free data transfer operations which minimize the need for retries of data transfer cycles previously initiated.

REFERENCES:
patent: 4162520 (1979-07-01), Cook et al.
patent: 4258418 (1981-03-01), Heath
patent: 4313162 (1982-01-01), Baun et al.
patent: 4322792 (1982-03-01), Baun
patent: 4390964 (1983-06-01), Horky et al.
patent: 4542457 (1985-09-01), Mortensen et al.

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