Miscellaneous active electrical nonlinear devices – circuits – and – Specific input to output function – Combining of plural signals
Reexamination Certificate
2005-12-12
2009-06-30
Lam, Tuan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific input to output function
Combining of plural signals
C327S359000, C327S407000
Reexamination Certificate
active
07554380
ABSTRACT:
A passive CMOS differential mixer circuit with a mismatch correction circuit for balancing the electrical characteristics of the two output paths. Once the output paths of the differential circuit are balanced, or matched as closely as possible, second order intermodulation product generation can be inhibited or at least reduced to acceptable levels. The mismatch correction circuit receives a digital offset signal, and generates one or more voltage signals to be selectively applied to the signal paths of the passive differential mixer circuit. The voltage signals can be adjusted back gate bias voltages applied to the bulk terminals of selected transistors to adjust their threshold voltages, or the voltage signals can be adjusted common mode voltages applied directly to a selected signal path. Since the differential mixer circuit is passive, no DC current contribution to noise is generated. The switching transistors of the mixer circuit can be maintained at minimal dimensions to reduce switching signal drive loading, resulting in lower power consumption and higher operating frequencies than if larger switching transistors were used.
REFERENCES:
patent: 5726597 (1998-03-01), Petty et al.
patent: 6242963 (2001-06-01), Su et al.
patent: 6590438 (2003-07-01), Manku et al.
patent: 6639446 (2003-10-01), Komurasaki et al.
patent: 6750704 (2004-06-01), Connell et al.
patent: 6859085 (2005-02-01), Watanabe et al.
patent: 6871057 (2005-03-01), Ugajin et al.
patent: 7109795 (2006-09-01), van Zeijl
patent: 2003/0155959 (2003-08-01), Belot et al.
patent: 2004/0209588 (2004-10-01), Bargroff
patent: 2004/0259519 (2004-12-01), Su
patent: 2006/0261875 (2006-11-01), Breems et al.
patent: 2007/0126491 (2007-06-01), Woo et al.
PCT Patent Application No. PCT/CA2006/001986, International Preliminary Report on Patentability dated Jun. 26, 2008.
Bellaouar Abdellatif
Embabi Sherif H. K.
Holden Alan R.
Jaehnig Jason P.
Eaton Peabody Patent Group LLC
Haszko Dennis R.
Icera Canada ULC
Lam Tuan
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