System for reducing noise coupling between digital and analog ci

Details System for reducing noise coupling between digital and analog ci System for reducing noise coupling between digital and analog ci

1995-09-18

1998-01-06

Gaffin, Jeffrey A.

Coded data generation or conversion

Sample and hold

H03M 100

Patent

active

057060045

ABSTRACT:
A system for reducing noise coupling in a mixed-signal IC includes a digital clock, an analog clock, and gating signal generator, and a gating circuit. The gating circuit receives a digital clock signal and the gating pulse to generate a gated digital clock signal having no pulses at a sampling edge of the analog clock signal to provide a "quiet time" for analog sampling.

REFERENCES:
patent: 4746899 (1988-05-01), Swanson et al.
patent: 5307066 (1994-04-01), Kobayashi et al.
patent: 5373293 (1994-12-01), Hirata
patent: 5422807 (1995-06-01), Mitra et al.
patent: 5479168 (1995-12-01), Johnson et al.

Affiliated with

Also associated with

Rating

System for reducing noise coupling between digital and analog ci does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System for reducing noise coupling between digital and analog ci, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System for reducing noise coupling between digital and analog ci will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2332829