System for reducing main memory access time by bypassing address

Details System for reducing main memory access time by bypassing address System for reducing main memory access time by bypassing address

1989-07-05

1990-11-06

Williams, Jr., Archie E.

Boots, shoes, and leggings

3642451, 3642447, 3642463, 3642554, 3642592, 3642598, 36424531, 364244, 3642467, 3642472, G06F 1204, G06F 1206, G06F 702, G06F 9355

Patent

active

049690868

ABSTRACT:
Proceeding from a known method and apparatus for expanding the address for accessing a main memory by a central controller of a switching system, a determination is made in a comparator as to whether the address information of the high-order address lines or address registers of the expansion device with respect to a preceding main memory access changes in comparison to the current main memory access. When coincidence is present, the high-order portion of the main memory address in the preceding main memory access stored in an address register is immediately used for the formation of the overall main memory address.

REFERENCES:
patent: 4307448 (1981-12-01), Sattler

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