System for reducing leakage in integrated circuits during...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Reexamination Certificate

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C327S203000, C327S544000

Reexamination Certificate

active

06998895

ABSTRACT:
A system for reducing current leakage in an integrated circuit. The system includes a first circuit component and a second circuit component in a path between a high voltage state and a low voltage state, such as ground. A feedback mechanism selectively provides feedback from an output of the second circuit component to an input of the first circuit component to selectively cutoff the path at the first circuit when the path is not cutoff at the second circuit. In a more specific embodiment, feedback mechanism preserves data in the integrated circuit via a multiplexer that selectively enables the feedback when the integrated circuit is in sleep mode. The first and second circuit components are High Voltage Threshold (HVT) CMOS inverters. The feedback path is chosen so that when the feedback path is activated, leakage paths through the CMOS inverters are cutoff.

REFERENCES:
patent: 5675272 (1997-10-01), Chu
patent: 5703500 (1997-12-01), Vo
patent: 5973529 (1999-10-01), Chappell et al.
patent: 6191606 (2001-02-01), Ye et al.
patent: 6275083 (2001-08-01), Martinez et al.
patent: 6337583 (2002-01-01), Ooishi et al.
patent: 6437623 (2002-08-01), Hsu et al.

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