Data processing: measuring – calibrating – or testing – Calibration or correction system – Circuit tuning
Reexamination Certificate
2002-03-29
2004-08-17
Barlow, John (Department: 2863)
Data processing: measuring, calibrating, or testing
Calibration or correction system
Circuit tuning
C455S238100, C710S022000, C710S305000
Reexamination Certificate
active
06778930
ABSTRACT:
BACKGROUND OF THE INVENTION
Applicants claim the benefits of foreign priority under 35 U.S.C. 119 of Japanese Application 2001-102341 filed Mar. 30, 2001. This Japanese application and its translation are incorporated by reference into this application.
This invention pertains to computers and other data processing systems and, more particularly, to a system that measures some aspect of bus signal distortion and, in response to that measurement of signal distortion, adjusts certain characteristics of the signals transmitted over the bus, or adjusts certain characteristics of the bus or the loads on the bus, so that signal distortion is reduced.
The power of host processors or “central processing units” (CPU's) has increased significantly in recent years. At the same time, the storage capacity of devices such as hard disk drives (HDD) and random access memory (RAM) has also increased. Consequently, the shear volume of data to be processed in a computer has increased dramatically, thereby requiring a corresponding increase in the data transfer rate between the various components of a computer.
In a personal computer (PC), storage devices such as a hard disk drive (HDD), a compact disc read only memory (CD-ROM), and various other peripheral devices such as audio and video adapters, are connected to a host processor board having a CPU and RAM (commonly called a “mother board”) through one or more peripheral buses such as the Integrated Device Electronics (IDE) bus or the Peripheral Component Interconnect (PCI) bus.
In a PC, the data transfer rate between the CPU and RAM is usually significantly higher than the data transfer rate between the mother board and the various peripheral components, which are usually interconnected to the mother board through one or more peripheral buses. Thus, the transfer of data across one of these peripheral buses is a bottleneck and, to alleviate this problem, improvements to these buses have been introduced over the years that raise the standard data transfer rate over the bus. For example, the standard data transfer rate for the IDE bus in AT attachment (ATA) has increased year by year, from 16 MB/sec, to 33 MB/sec, 66 MB/sec and 100 MB/sec. But as the data transfer rate over these peripheral buses increases, distortion in the waveform of the data signals also increases, which may result in a data transfer error.
FIG. 14
a
shows the waveform W
1
of an exemplary signal transmitted from the transmit side, and
FIG. 14
b
illustrates the waveform W
2
of the signal on reception at the receive side. The waveform W
2
has an overshoot in the rising edge (labeled P in
FIG. 14
b
), and an undershoot in falling edge (labeled Q). As a result of this ringing, the signal takes a certain time to settle to a constant value such as high level R or low level S in
FIG. 14
b.
One of the causes of waveform distortion is related to the bus cables that carry the signal between the host and the peripheral device. Therefore, for signal waveform stabilization, specifications such as the number of pins in the bus cable or the configuration of the ground lines are sometimes modified when the standard of data transfer rate for the bus is changed.
Another cause of waveform distortion is related to electrical compatibility between a host device
1
and peripheral devices
2
and
3
, as shown in FIG.
15
. Specifically, the peripheral devices
2
and
3
(e.g., storage devices such as HDD, CD-ROM, and audio and video controllers) have different electrical loads depending on their kind and type. Accordingly, when data is transferred from host device
1
through bus
4
to peripheral devices
2
and
3
, the signal waveforms may be distorted because of the electrical loads of the peripheral devices on the receiving side. Typically, terminating resistors
5
are pre-inserted into host device
1
and peripheral devices
2
and
3
prior to the shipment, so that the electrical load balance depends on the combination of the particular host device
1
, and the particular peripheral devices
2
and
3
that are attached to bus
4
.
However, many PC systems are configured according to the purchaser's specifications, so that many different types, makes and models of peripheral devices can be attached to the bus. Since each one of these different types, makes and models of peripheral devices can have different load characteristics, and since there is a very large number of possible combinations of these various peripheral devices that can be attached to the bus, it is difficult and not cost effective to change the termination resistor
5
for each such combination of type, make and model of peripheral device attached to the bus. In addition, If a user attaches a peripheral device to the bus, thereby changing the configuration of the PC system from the way it was originally shipped to the end user, the bus signal waveform may be distorted because of the change in the electrical load on the bus, and it is difficult for the user to change or adjust the termination resistor to reduce signal distortion.
Accordingly, the invention described below overcomes many of these disadvantages of the prior art computer system by measuring bus signal distortion and then adjusting certain characteristics of the signal transmitted over the bus, or adjusting other characteristics of the bus or the loads on the bus so that signal distortion is reduced.
SUMMARY OF THE INVENTION
According to such an object, in a data transfer apparatus of the present invention, data signal that is transmitted by a signal transmission means and transferred through a bus is received by a signal reception means. Then, the signal received by the signal reception means is diagnosed by a signal diagnosis means and a characteristic of the signal received by the signal reception means is adjusted based on the diagnosis result by a signal adjustment means.
The characteristic of a signal to be adjusted may be at least one selected from an overshoot at a pulse rising, an undershoot at a pulse falling, a data setup time and a data hold margin in the signal at the receiving side. Alternatively, it may also be a signal reflection or the like.
The signal adjustment means preferably adjusts the characteristic of the signal received by the signal reception means, by adjusting a slew rate of the signal at the receiving side. Alternatively, it may adjust the characteristic of the signal by adjusting a resistance value of a terminating resistor at one or both of the signal transmission means and the signal reception means.
The signal at the receiving side can thus be stabilized by adjusting the characteristic of the signal at the receiving side.
Specifically, the signal received by the signal reception means may be fed back to the signal transmission means through a feedback circuit, and the feedback signal may be diagnosed by the signal diagnosis means at the signal transmitting side, and the characteristic of the transmitted signal may be adjusted by the signal adjustment means.
Instead of diagnosing the signal at the signal transmitting side, the signal diagnosis means may be provided in the signal reception means. In this case, diagnosis information obtained by diagnosing the signal may be outputted at the signal diagnosis means, and the characteristic of the signal may be adjusted by the signal adjustment means provided in the signal transmission means, based on the outputted diagnosis information. In this case, a command corresponding to the diagnosis result may also be transferred as the diagnosis information through the bus to the signal adjustment means, and the characteristic of the signal may be then adjusted according to the command. Other than the bus, a diagnosis information transfer circuit may be disposed between the signal diagnosis means and the signal adjustment means, and a signal representing the diagnosis result may be transferred to the signal adjustment means through the diagnosis information transfer circuit. Additionally, the diagnosis information at the signal diagnosis means may be stored in a diagnosi
Komiyama Hirohide
Sugawara Takashi
Barlow John
International Business Machines - Corporation
Le John
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