System for recovery of digital data from amplitude and phase...

Pulse or digital communications – Receivers – Angle modulation

Reexamination Certificate

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C375S371000, C330S149000

Reexamination Certificate

active

06178208

ABSTRACT:

TECHNICAL FIELD
The present invention relates to digital data transmission using analog signals and, more particularly, to a novel demodulation system for recovery of digital data from an amplitude and phase modulated line signal using digital delay lines.
BACKGROUND ART
In data networks designed to receive, switch and transmit analog signals, digital devices are attached to a communication line via a modem that converts digital data to analog line signals and vice versa. The modem modulates data prior to sending them over such communication lines as a telephone wire, a CATV coaxial cable, an optical cable, or a wireless communication link. The basis for analog signal transmission is a continuous constant-frequency signal known as a carrier signal. For example, the carrier signal may be defined as v
s

(t)=V
s
cos(2&pgr;ft+&phgr;
s
), where f is the frequency, V
s
is the amplitude, and &phgr;
s
is the phase of the carrier signal. Modulation involves operation on one or more of the three characteristics of the carrier signal: amplitude, frequency or phase. Accordingly, three basic modulation techniques are used for transforming digital data into analog line signals: amplitude modulation, frequency-shift keying and phase modulation or phase-shift keying.
Digital data are represented by a finite number of values, each of which defines a digital symbol. Each symbol may be composed of one or more bits. Amplitude modulation enables a modem to transmit analog equivalents of digital symbols by varying the amplitude of the carrier signal. For example, if a symbol consists of two bits, the entire continuous range of the signal amplitudes is divided into four bands, each of which represents one of four possible symbols 00, 01, 10 or 11. For instance, for a signal in a range from −3 V to 3 V, amplitudes smaller than −2 V may represent 00, amplitudes between −2 V and 0 V may correspond to 01, amplitudes between 0 V and 2 V may represent 10, and amplitudes larger than 2 V may correspond to 11. Alternatively, such transformation may be carried out by pulse-amplitude modulation that uses a pulse carrier.
Frequency-shift keying may use different frequencies of the carrier signal to represent binary 1 and binary 0. This technique is suitable for low-speed devices.
In phase modulation, the carrier signal is shifted a certain number of degrees in response to the digital pattern coming from a digital device. For example, to represent two-bit symbols 00, 01, 10 or 11, four phase values of the carrier signal are required. For instance, a phase value between 0 and &pgr;/2 may correspond to 00, a phase value between &pgr;/2 and &pgr; may represent 01, etc.
Amplitude and phase modulations of a carrier signal may be combined to form a line signal with amplitude and phase representing digital data to be transmitted. Each symbol of the digital data may be defined as a vector with a certain length represented by the amplitude of the line signal, and a certain angle or phase with respect to a reference, for example, the horizontal axis. For instance, in each 4-bit digital symbol, two bits may be represented by four different values of amplitude, and two bits may be represented by four different values of phase.
Various demodulation techniques have been developed for modems that convert digital data into modulated analog signals at a transmitting side and recover the digital data from the analog signals at a receiving side. These techniques are built either entirely on digital circuitry or entirely on analog circuitry. However, digital demodulators are slow and may be used only for low-speed applications, such as voice-band modems. Although analog demodulators are much faster than the digital systems, their reliability is poor.
Thus, it would be desirable to provide a novel demodulation system for recovery digital data from analog line signals, which would be faster than the digital systems and more reliable than the analog systems.
Also, it would be desirable to provide a novel system for demodulating amplitude and phase modulated line signals representing digital data.
DISCLOSURE OF THE INVENTION
Accordingly, one advantage of the present invention is in providing a fast and reliable system for converting digital data into analog line signals.
Another advantage of the present invention is in providing a novel system for amplitude and phase modulation of line signals representing digital data.
The above and other advantages of the invention are achieved, at least in part, by providing a demodulation system that comprises an amplitude decoder that detects an amplitude value corresponding to an amplitude of a received amplitude and phase modulated line signal. A receive delay line is supplied with the line signal to produce a plurality of reference phase values delayed with respect to each other. The reference phase values are aligned with respect to a mark on the received line signal. A reference delay line supplied with a reference signal is used for adjusting the receive delay line. A phase detector compares the received line signal with the plurality of reference phase values to determine a phase value corresponding to the phase of the line signal. A symbol decoder decodes the determined amplitude and phase values to identify digital data represented by the amplitude and phase of the line signal.
In accordance with one aspect of the invention, a reference delay line control circuit may be coupled to an output of the reference delay line to compare the reference signal delayed by the reference delay line with a period of the reference signal supplied by a local reference source, in order to adjust a reference delay time provided by the reference delay line. The reference delay line control circuit is coupled to a delay control input of the receive delay line to adjust the delay time of the receive delay line in accordance with the reference delay time.
In accordance with another aspect of the invention, a receive delay line control circuit may be coupled to an output of the receive delay line to align signals delayed in the receive delay line with the mark on the received line signal.
Preferably, the receive and reference delay lines comprise a plurality of digital delay cells connected in series. The reference phase values are produced at outputs of the delay cells in the receive delay line and provide a reference phase range corresponding to a total delay time of the receive delay line.
In accordance with a method of the present invention, the following steps are carried out to recover digital data from a received amplitude and phase modulated line signal:
decoding the line signal to determine an amplitude value corresponding to its amplitude,
calibrating a reference delay line using a reference signal at the frequency of the line signal,
adjusting a receive delay line in accordance with the reference delay line,
supplying the receive delay line with the line signal to produce reference phase values delayed with respect to each other,
comparing the line signal with the reference phase values to determine a phase value corresponding to the phase of the line signal, and
decoding the amplitude and phase values to identify digital data represented by the amplitude and phase of the line signal.
The reference phase values may be aligned with respect to a mark on the received line signal.
Still other objects and advantages of the present invention will become readily apparent to those skilled in this art from the following detailed description, wherein only the preferred embodiment of the invention is shown and described, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.


REFERENCES:
patent: 4736242 (1988-04-01), Takanas

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