System for processing synchronization signals with phase synchro

Details System for processing synchronization signals with phase synchro System for processing synchronization signals with phase synchro

1996-02-09

1997-06-03

Chin, Wellington

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

370516, 375364, 34082514, H04J 306

Patent

active

056362196

ABSTRACT:
A system is provided for processing synchronization signals. A plurality of synchronization signals are received having different periods and different degrees of priority, and are used to generate a regenerated synchronization signal in response to clock pulses. A selector is used for selecting a selected synchronization signal, from among those received synchronization signals having a correct period. The selected synchronization signal is chosen based upon the different degrees of priority. A nonvolatile memory stores memorized synchronization signal and an allowable phase range. An address counter, which receives as an input a controllable initial value, counts the clock pulses to produce a clock count over a period of time, and to cause the nonvolatile memory to output the stored synchronization signal as a read-out synchronization signal and to output the stored allowable phase range as a read-out range, in response to the clock count. The controllable initial value, which is used as an input to the counter, is controlled by a timing control. The timing control is supplied with the selected synchronization signal from the selector and the read-out phase range from the nonvolatile memory. The timing control changes the value of the controllable initial value at such a time so as to cause the read-out synchronization signal and the read-out phase to be read from the nonvolatile memory when the selected synchronization signal has a phase in said read-out phase range.

REFERENCES:
patent: 3725593 (1973-04-01), Palombari
patent: 4006314 (1977-02-01), Condon et al.
patent: 4488290 (1984-12-01), Dunn et al.
patent: 4598413 (1986-07-01), Szechenyi
patent: 5014271 (1991-05-01), Fujimoto et al.
patent: 5117424 (1992-05-01), Cohen et al.
patent: 5134609 (1992-07-01), Mori et al.
patent: 5210755 (1993-05-01), Nagler et al.
Patent Abstracts of Japan, vol. 10, No. 170, Jun. 17, 1986 & JPA-61-023-433.
IEEE Transactions on Communications, vol. 38, No. 6, Jun. 1990, pp. 830-837, N. Mehravari et al., "Frame Synchronization in a Photonic Network of Time Multiplexed Space Switches Via a Feedback Scheme".
Patent Abstracts of Japan, vol. 10, No. 384, Dec. 23, 1986.
NEC Research and Development, vol. 38, No. 37, pp. 15-22, H. Goto et al.., "Station Clocks for Datran Digital Data Network".
Proceedings of the 44th Annual Symposium of Frequency Control, May 23, 1990, pp. 117-126, S.M. Bass et al., "A Redundant Timing Source for digital Telecommunication Network Synchronization".
NEC Research and Development, No. 3, Apr. 1979, pp. 87-100, H. Kaneko et al., "Digital Data Transmission System and Equipment".
International Switching Symposium 1979, May 7, 1979, p. 221, H. Suckfull et al., "Architecture of a New Line of Digital Switches".
International Switching Symposium 1984, vol. 2, May 7, 1984, pp. 34B.3.1-34B.3.7, BS. Vianna et al., "Tropico R --Characteristics and Internal Structure".
Elektrotechnik Und Informationstechnik, vol. 106, No. 11, Nov. 1989, pp. 485-495, Pollhuber, "Hardware-Struktur und Hardware-Funktion der System-Variante OES-S des osterreichischen DIgitalen Telefonsystems".
Telcom Report Special, vol. 10, Mar. 1987, pp. 180-185, D. Niethammer, "Netztaktversorgung NTV-2 mit hochstabiler und redundanter Taktregenerierung fur digitale Fernmeldenetze".
Patent Abstracts of Japan, vol. 12, No. 304, Apr. 4, 1988.
International Switching Symposium 1981, Sep. 21, 1981, pp. 14.1.1-14.1.9, M. Ballard et al., "The E10.S-Tss.5: A Multipurpose Digital Switching System".

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