System for processing eight bytes or less by the move, pack and

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3642295, 36423223, 3642405, 3642547, 3642557, 3642558, 3642624, 36426281, 3642629, 364DIG1, 364DIG2, 395375, G06F 924, G06F 930, G06F 938

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054267838

ABSTRACT:
A processing system comprising a first means for generating first signals indicating when the next instruction can begin processing where eight or less bytes are processed by the MOVE, PACK or UNPACK instruction, a second means for generating second signals if an overlap condition exists for the MOVE, PACK or UNPACK instruction being processed, and where the first means generates the first signals prior to the second means generating the second signals and independent of whether the second means generates the second signals.

REFERENCES:
patent: 4376976 (1983-03-01), Lahti et al.
patent: 4750112 (1988-06-01), Jones et al.
patent: 4926323 (1990-05-01), Baror et al.
patent: 5269017 (1993-12-01), Hayden et al.

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