System for prioritizing quiesce requests and recovering from a q

Details System for prioritizing quiesce requests and recovering from a q System for prioritizing quiesce requests and recovering from a q

1995-03-31

1997-12-02

Harvey, Jack B.

Communications: electrical

Land vehicle alarms or indicators

Internal alarm or indicator responsive to a condition of the...

395737, 395859, 39518213, 39520001, 395800, 34082509, G06F 1100, G06F 1300

Patent

active

056946171

ABSTRACT:
A milli-mode routine handles a quiesce interrupt, and causes all the processors in the system to enter a quiesced state. A single bit of a millicode control register indicates a quiesced state and drives an output of the processor to indicate the processor is in a quiesced state. The processor receives a signal indicating all processors in the system are in a quiesced state and latches this value. The output of this latch is sent to the processor instruction unit for use as a millicode branch condition.

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IBM/TDB vol. 35 No. 4A, Sept. 1992, "Milli-Code", Bullions et al., pp. 451-454.

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