System for phase locking clock signals to a frequency encoded da

Details System for phase locking clock signals to a frequency encoded da System for phase locking clock signals to a frequency encoded da

1981-04-30

1984-01-03

Sikes, William L.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

329 50, 329107, 329122, 331 25, 360 51, 375 81, 375120, H03L 708, H03D 318

Patent

active

044244975

ABSTRACT:
In a system having a frequency encoded data stream and a source of clock signals phase locked to the data stream, for subsequent demodulation of the data stream, the clock source is at a frequency that is a multiple of the nominal frequency for demodulating, and a counter is employed to divide the clock. The counter is controlled by the output of a phase comparator, to control the addition to and inhibiting of counting of the counter. The control circuit controls the counter in a non-linear relationship with respect to the phase error, and has a memory function for storing previous states of the counter, to permit repetitive correction for small errors in the same manner. The phase comparator and control are preferably a programmed logic array.

REFERENCES:
patent: 3624511 (1971-11-01), Chin-Chun Sui
patent: 4017806 (1977-04-01), Rogers
patent: 4030045 (1977-06-01), Clark

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