System for optimizing the equalization pulse of a read sense amp

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518533, 365201, G11C 1606, G11C 700

Patent

active

061250589

ABSTRACT:
A system for optimizing the equalization pulse of a read sense amplifier is disclosed. A number of capacitor circuits are provided that can be coupled to a timing circuit in a variety of combinations. The different combinations of coupled and decoupled capacitor circuits result in different durational lengths of the equalization pulse. A testing sequence determines the optimal durational length of the equalization pulse by testing the different combinations of coupled capacitors. The optimal combination is then permanently stored in attribute cells for optimizing the equalization pulse in normal operation.

REFERENCES:
patent: 5140553 (1992-08-01), Choi et al.
patent: 5400282 (1995-03-01), Weiler et al.

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