System for obtaining strict solution in accordance with accuracy

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G06F 738

Patent

active

056318588

ABSTRACT:
A multiplication, division and square root extraction apparatus which calculates the solutions to addition, division and square root extraction functions by approximation using iteration has a multiplier, an adder-subtracter and a shifter of prescribed bit width connected to a bus. Iteration is conducted by inputting the output of the multiplier to the adder-subtracter or the shifter and returning the result to the input of the multiplier via the bus. A shifter and an arithmetic and logic unit connected to a second bus connected to the aforesaid bus via a switch have a greater bit width than the prescribed bit width and are used for large scale calculations, thus preventing a reduction in processing speed.

REFERENCES:
patent: 3590229 (1971-06-01), Humphreys
patent: 3892952 (1975-07-01), Shibata et al.
patent: 3928756 (1975-12-01), Auray

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