System for monitoring an execution pipeline utilizing an address

Details System for monitoring an execution pipeline utilizing an address System for monitoring an execution pipeline utilizing an address

1997-07-01

1999-11-30

Ellis, Richard L.

Electrical computers and digital processing systems: processing

Architecture based instruction processing

712 42, 714 38, G06F 930

Patent

active

059960590

ABSTRACT:
An address pipeline includes a sequence of registers for storing the memory addresses of instructions currently being processed within the different stages of an execution pipeline. In parallel with the execution pipeline, the address pipeline advances the corresponding memory addresses as the instructions are advanced through the execution pipeline. Address pipelining allows the programmer of a pipelined processor to understand the otherwise hidden operation of a pipelined processor by giving the programmer means to track instructions through the pipeline. In addition, the address pipeline includes an instruction status register for indicating whether an instruction at any given stage of the pipeline has been executed and a program counter address breakpoint register for storing the address of the instruction that actually triggers a breakpoint.

REFERENCES:
patent: 5564028 (1996-10-01), Swoboda et al.
patent: 5572690 (1996-11-01), Molnar et al.
patent: 5600848 (1997-02-01), Sproull et al.
patent: 5604878 (1997-02-01), Colwell et al.
patent: 5682493 (1997-10-01), Yung et al.
patent: 5704054 (1997-12-01), Bhattacharya

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