System for measuring jitter in a non-binary digital signal

Details System for measuring jitter in a non-binary digital signal System for measuring jitter in a non-binary digital signal

1995-08-11

1998-05-05

Chin, Wellington

Pulse or digital communications

Testing

Phase error or phase jitter

371 1, 36471506, 364732, H04B 346

Patent

active

057486727

ABSTRACT:
To measure various frequency components of the jitter of the deviation of the transition times in a signal on a signal line (44) from nominal bit times, a sampler (40) samples the signal at a rate high enough to determine the transition time with the required resolution. By employing a differentiator (60), test circuitry (FIG. 3B) can detect not only zero crossings but all digital-level transitions. The timings of the maxima of the differentiator output are applied to a Fourier-transform unit (76) that computes jitter-frequency components from a resultant sequence of deviations of the maxima from nominal transition times. Although computation of the lowest jitter-frequency components is necessarily based on a sequence that extends over a correspondingly long signal record, the input of a memory (48) that receives the raw samples from which those transition-time deviations are computed is so gated that the memory (48) receives only infrequently occurring bursts of the sampler's high-sample-rate output when the lower jitter frequencies are to be measured. A memory (48) of only moderate size can therefore be employed despite the necessarily high sample rate and necessarily long record duration.

REFERENCES:
patent: 4320516 (1982-03-01), Kammerlander
patent: 4603300 (1986-07-01), Well, II et al.
patent: 4819197 (1989-04-01), Blais
patent: 5528636 (1996-06-01), Sevenhans et al.

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