System for low voltage programming of non-volatile memory cells

Details System for low voltage programming of non-volatile memory cells System for low voltage programming of non-volatile memory cells

2006-12-21

2009-11-24

Yoha, Connie C (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185030, C365S185280, C365S185210, C365S185180

Reexamination Certificate

active

07623389

ABSTRACT:
System for programming a selected non-volatile memory cell in a memory array having a gate node coupled to a wordline WL(n) and a drain node connected to a selected bitline by injecting hot carriers from a drain region of an injecting memory cell having a gate node coupled to a next neighbor wordline WL(n−1) into a floating gate of the selected non-volatile memory cell on the wordline WL(n).

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