System for interrupt arbitration

Details System for interrupt arbitration System for interrupt arbitration

1980-10-20

1983-04-26

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 304

Patent

active

043815421

ABSTRACT:
A data processing system in which a unit needing to be serviced by a processor first requests an interrupt and, after the interrupt is granted by the processor, requests access to a system bus to transfer interrupt information as it normally would transfer other information. The interrupting unit must wait for other units having higher priority to transfer information, usually memory information over the bus, before it can access the bus to transfer its interrupting information. This permits transfers of information having higher priority to occur before the transfer of the interrupt information is transferred.

REFERENCES:
patent: 3815099 (1974-06-01), Cohen
patent: 3836889 (1974-09-01), Kotok
Thurber, K., et al., "A Systematic Approach to the Design of Digital Bussing Structures", Proceedings, Fall Joint Computer Conference, 1972, pp. 719-740.

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