System for interconnecting stacked integrated circuits

Details System for interconnecting stacked integrated circuits System for interconnecting stacked integrated circuits

1995-06-05

1997-10-28

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

257723, 257774, H01L 2302

Patent

active

056820623

ABSTRACT:
A surface mountable integrated circuit and a method of manufacture are disclosed. A wafer 110 has a die with an integrated circuit 119 in one surface of the wafer. A via 130 extends to the opposite surface. the via has a sidewall oxide 131 and is filled with a conductive material such as metal or doped polysilicon. The metal may comprise a barrier layer and an adhesion layer. The second end of the via can be fashioned as a prong 233 or a receptacle 430. Dies 335a, 335b, 335c with conductive vias are stacked on top of each other. Other dies 341, 343 are connected together with an optical coupling die 342.

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