Data processing: structural design – modeling – simulation – and em – Emulation – Compatibility emulation
Reexamination Certificate
1999-01-04
2002-04-09
Frejd, Russell W. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Emulation
Compatibility emulation
C702S022000, C702S028000
Reexamination Certificate
active
06370496
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates to the control of computer hardware and microprocessor peripherals and the development of control software for such systems. This invention is especially applicable to microprocessor-based systems which employ memory-mapped and bit-mapped register control of system resources, peripherals, and subsystems.
BACKGROUND OF THE INVENTION
Current systems for developing control software for microprocessor-based systems involve a variety of “debugger” tools which provide some level of visualization of software instructions and data. Control software to be developed can be divided into several categories: computer instructions, which may be in a high level language or an assembly language; program data, which can be in the form of variables with associated variable and structure symbolic names; and system status, which includes control registers within the microprocessor, its peripherals, and memory mapped areas.
When software is compiled to executable code, it is stored in system memory in a binary format since computer memories are binary arrays of rows and columns, organized into “addresses” and “locations”. Each location may be a group of 8 bits (a byte), 16 bits (a word), or 32 bits (a double word). During software development, a software design engineer may use a software development system to compile and load the software into the system memory through a variety of well-known methods, including “C” compilers, processor-specific assemblers, “debuggers” and in-circuit emulators (“ICE”). Once loaded into system memory, the software may be executed under control of the software development system. The software engineer may view the contents of memory, including software instructions, data, and system status, in binary, decimal or hexadecimal format. If the area of memory being viewed contains compiled software code, the software development system may “reverse assemble” the binary data into viewable assembly code. If the “C” source code is loaded into the software development system, the “C” source code associated with the assembly language may also be referenced and viewed. Further, if a “symbolic map” is loaded into the software development system, memory areas containing constants, variables, arrays, and other structures may be found and viewed using the name of the constant, variable, array, or structure.
Almost all microprocessor-systems contain memory-mapped and bit-mapped registers for configuration and control of the system hardware. Each register, located at a specific memory-mapped address, contains individual bits or fields of bits grouped into partial or complete bytes, words, or double words. These individual bits and fields of bits either control hardware functions and options in writable registers, or show the status of hardware functions and options in readable registers. For example, and particular register located at address 0xFFEA000 may be a control register for the interrupt controller peripheral. Further, this register may be bit-mapped as follows:
Register Bit Slot
Function
Description
0 (least significant bit)
interrupt enable
1 = enabled, 0 = disabled
1-3
interrupt type
000 = active high
001 = active low
010 = rising edge trigger
int. type (cont.)
100 = falling edge trigger
4
mask interrupt
level 0 mask
(1 = masked,
0 = unmasked)
5
mask interrupt
level 1
6
mask interrupt
level 2
7
mask interrupt
level 3
8-15
Reserved, clear to 0
In this example, a hypothetical control register for a system interrupt controller is given. If the software designer desires interrupts to be enabled in the system, the appropriate values for each bit in the register must be selected, then concatenated into a 16-bit hexdecimal or binary value, and finally software must be written which will write this 16-bit value to the control register located at the appropriate address.
Throughout system runtime, the software may change the value of each or all of the bits in the control registers depending on real time events and software logic. Additionally, the computer hardware may change the values of register bits dynamically to indicate the current operating mode and status. At any given time in any given state, and software designer may desire to view or check the particular value of a bit or bit field in a control or status register, or change the value of a bit or bit field in a control register. Since prior art software development systems provide only binary or hexadecimal viewing and writing of these control registers, the software designer is forced to manually perform bit and bit field extraction operations, comparison of the values to tables and charts within microprocessor and peripheral documentation and specifications, and manual calculation of new bit-mapped values.
Each microprocessor and each system peripheral may have several to hundreds of associated control and status registers, and each register has many bits and bit fields. There may be literally thousands of hardware configuration options, control functions, and status indicators to be controlled by the system software. To complicate the situation further, many combinations of hardware function selections may be mutually incompatible with other selections, and some status register indicators may change function based on modes and functions selected in other writeable control registers. Some versions of the computer hardware implementation may have known problems that preclude the use of or cause improper operation of selected options. Commonly, integrated circuit manufacturers will distribute “errata” sheets to update the original printed specification sheets for the components.
This deficiency in the software development system results in increased time to develop and diagnose software, an increase in software and system errors which remain uncorrected before release of new products, and reduced ability of a system and software designer to take full advantage of hardware functionality within the system.
There exists, therefore, a need in the art for a software development system which provides the ability to generate binary values to be written into bit-mapped hardware control and status registers based on a selection of intelligent, symbolic criteria related to the hardware specifications for microprocessor and peripheral control registers.
Further, there exists a need in the art for a software development system to allow symbolic visualization of bit-mapped registers related to the hardware specifications for microprocessor and peripheral control registers.
There exists additionally a need in the art to provide a real time trace, halt, and trigger capability in a software development system which allows a software designer or system diagnostician to specific system control and status registers values on which to take specified actions based on symbolic definitions of those bit-mapped registers.
There also exists a need in the art for such a software development system to provide rule-based verification and error detection means which reviews and validates a particular set of hardware configuration option selections, and provides a software designer warnings and error messages about detected incompatible or unavailable selections through symbolic representations.
Finally, there exists a need in the art for this software development system to be easily configured for various microprocessor, peripherals, and user-defined hardware through a system and network of encode and decode register maps and rules.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a software development system which enables a software design engineer or system diagnostician to generate binary values to be written into bit-mapped hardware control registers based on a selection of intelligent, symbolic criteria related to the hardware specifications for microprocessor and peripheral control registers.
A further object of the present invention is to provide a software development system through the use of whic
Frantz Robert H.
Frejd Russell W.
Intelect Communications Inc.
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