Patent
1997-09-24
1999-02-02
Harrell, Robert B.
395590, G06F 300
Patent
active
058677011
ABSTRACT:
A system for inserting a supplemental micro-operation sequence into a macroinstruction-generated micro-operation flow provides a versatile, flexible mechanism for early pipeline stages of a microprocessor to pass control signals, data, and other information to later pipeline stages. The mechanism is useful to maintain precise timing of a fault model in pipelined processors. A method includes the step of detecting the occurrence of a predetermined uop-inserting event and, responsive thereto, generating a control signal to a uop insertion unit. Responsive thereto, the uop insertion unit supplies signals to a decoder which, responsive thereto, decodes the signal encoded within the signal to provide the inserted uop sequence, which is inserted in a position within the macroinstruction-generated micro-operation flow predetermined by the uop-inserting event.
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Brown Gary L.
Prasadh R. Guru
Harrell Robert B.
Intel Corporation
Oredovitz David M.
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