System for improving low voltage CMOS performance

Details System for improving low voltage CMOS performance System for improving low voltage CMOS performance

2000-02-15

2001-11-20

Zweizig, Jeffrey (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

Reexamination Certificate

active

06320446

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to the operation of low voltage CMOS circuitry, and more particularly, to the transmission of low voltage CMOS signals through pass-transistor logic.
BACKGROUND OF THE INVENTION
In conventional pass-transistor circuits, where the pass-transistor includes a gate, drain and source terminal, the gate and drain high logic levels are equal to the power supply voltage. Under these conditions the source high logic level is reduced by the MOS threshold voltage Vt. This results in decreasing the noise margin and speed of the pass-transistor stage. Moreover, when a load capacitance connected to the source is charged, the effective control voltage decreases from a maximum value to zero and the drain-to-source resistance increases from a minimum value to the infinity. This substantially increases the low-high delay of the pass-transistor stage. Attempts to increase speed by means of decreasing pass threshold leads to increasing the subthreshold leakage current, thereby increasing the power consumption. This also decreases the discharge time when operating in a dynamic mode.
SUMMARY OF THE INVENTION
The present invention includes a system for increasing the speed and noise immunity of signals transmitted in low voltage CMOS (LVCMOS) applications by means of high voltage controlled pass transistor logic.
In an embodiment of the present invention, a transmission device for transmitting a signal in a CMOS circuit is provided, wherein the CMOS circuit includes a high voltage power supply and a low voltage power supply and the signal is transmitted between first and second portions of the CMOS circuit that are coupled to the low voltage power supply. The transmission device comprises a transistor having a gate, drain and source terminals, wherein the drain terminal is coupled to the first portion of the CMOS circuit to receive the signal, and the source terminal is coupled to the second portion of the CMOS circuit and a gate controller coupled to the high voltage power supply and providing a gate control signal coupled to the gate terminal, wherein the gate controller may provide a level approximately equal to the high voltage power supply to the gate terminal via the gate control signal, so that the transistor connects the drain and source terminals.


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