System for host accessing local memory by asserting address sign

Details System for host accessing local memory by asserting address sign System for host accessing local memory by asserting address sign

1993-08-27

1998-03-31

Lee, Thomas C.

395410, G06F 1310

Patent

active

057349240

ABSTRACT:
A host adapter contains a RISC processor, a local memory, and a memory management unit that permits the RISC processor and a host computer system to access a local memory. The host computer system writes command descriptions directly into the local RAM. The RISC processor retrieves and processes the command descriptions. The local RAM may be divided into numbered command description blocks having a fixed size and format. In standard bus protocols, such as SCSI-2, block numbers are used as tag messages. Such tag messages allow the host adapter to quickly identify information used when an SCSI I/O request is resumed. The command description blocks may be linked into lists, including an active list containing command description blocks that are ready for the RISC processor and a free list containing command description blocks that are available for use by the host computer.

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