System for feeding clock signals

Details System for feeding clock signals System for feeding clock signals

1987-11-23

1989-07-11

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328 55, 328 62, 328 63, 328105, 331 2, H03K 515, H03L 700

Patent

active

048475165

ABSTRACT:
A system for feeding clock signals to a plurality of load units comprises an oscillator for generating a first clock signal having a predetermined frequency, a plurality of signal lines for transmitting a signal representative of the first clock signal to a plurality of load units, and delays assigned to the plurality of signal lines for adjusting phases of the signal transmitted on a corresponding line at connection points between the oscillator and the load unit. Each load unit is responsive to the signal transmitted on a corresponding signal line for producing second clock signals with a frequency n times greater than that of the second clock signals where n is an integer greater than one. Each load unit further is responsive to the second clock signal for generating a plurality of third clock signals which have discrete phases. The plurality of load units are synchronized with at least one of the plurality of third clock signals.

REFERENCES:
patent: 3725793 (1973-04-01), Phillips
patent: 3745472 (1973-07-01), Garth
patent: 3921079 (1975-11-01), Heffner et al.
patent: 4122404 (1978-10-01), Fuhrman
patent: 4185245 (1980-01-01), Fellinger et al.
patent: 4337433 (1982-06-01), Yoshimura
patent: 4560939 (1985-12-01), Dekarske et al.
patent: 4661721 (1987-04-01), Ushiku
patent: 4686482 (1987-08-01), Zoetman et al.
patent: 4691124 (1987-09-01), Lodzius et al.
patent: 4757264 (1988-07-01), Lee et al.
ECL Data Book, Fairchild Semiconductor, pp. 9-19*.

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