Patent
1995-06-07
1998-06-09
Kim, Kenneth S.
395391, 395559, 39580021, 395580, G06F 940
Patent
active
057650373
ABSTRACT:
A system and method reorder instructions for effecting faster branch execution. A processor element is coupled to receive stored instructions in a first order, and to process the received instructions in a different order, the processing occurring after each stored instruction of a first type is issued, and after a delay time, after each stored instruction of a second type is issued. The delay time is based on a delay value associated with the second type of instructions. In particular, the instructions include branch and non-branch instruction wherein firing time information identifies a time of execution of the branch instruction which is a variable number of instructions cycles prior to a time of execution of a last to be executed instruction in a basic block. Accordingly, branch instructions can be completely executed no later than during the processing of the last to be executed non-branch instruction in the basic block thereby speeding up overall processing of the software program by the system.
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Brooks Christopher Bancroft
Gluck Frederick George
Morrison Gordon Edward
Biax Corporation
Kim Kenneth S.
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