System for enabling a CPU and an image processor to synchronousl

Details System for enabling a CPU and an image processor to synchronousl System for enabling a CPU and an image processor to synchronousl

1995-05-22

1998-12-01

Tung, Kee M.

Computer graphics processing and selective visual display system

Computer graphic processing system

Integrated circuit

345507, G06F 1206

Patent

active

058445749

ABSTRACT:
A synchronization system includes an image processor, a RAM, a CPU with an R/W interface, and a time controller. The time controller generates synchronization signals based on image control signals and ALE signals respectively generated by the image processor and the CPU. The image processor and the CPU can access the RAM synchronously according to the synchronization signals.

REFERENCES:
patent: 4307393 (1981-12-01), Hamada et al.
patent: 4546350 (1985-10-01), Tanaka
patent: 4691237 (1987-09-01), Shimizu
patent: 5282268 (1994-01-01), Mieras et al.

Affiliated with

Also associated with

Rating

System for enabling a CPU and an image processor to synchronousl does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System for enabling a CPU and an image processor to synchronousl, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System for enabling a CPU and an image processor to synchronousl will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2399226