System for DMA transfer wherein controller waits before executio

Details System for DMA transfer wherein controller waits before executio System for DMA transfer wherein controller waits before executio

1996-05-10

1998-09-22

Lee, Thomas C.

395842, 395555, G06F 1328

Patent

active

058128786

ABSTRACT:
An apparatus for and method of controlling data transfers in which the data is in a predefined format. The DMA controller with a status register cooperates with a counter capable of effecting a change in the contents of the status register to generate predefined leading sequences of pulses. The arrangement may also include a module which can detect a predefined trailing sequence and effect a change in the contents of the status register.

REFERENCES:
patent: 4631702 (1986-12-01), Korba
patent: 5448717 (1995-09-01), Balmer
patent: 5491814 (1996-02-01), Yee
patent: 5530906 (1996-06-01), Cho
patent: 5555559 (1996-09-01), Tsubota
patent: 5577214 (1996-11-01), Bhattacharya
patent: 5617576 (1997-04-01), Solari

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