System for dividing processing tasks into signal processor and d

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364DIG1, 364280, 3642804, G06F 944

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active

055242448

ABSTRACT:
Architectures and methods are provided for efficiently dividing a processing task into tasks for a programmable real time signal processor (SPROC) and tasks for a decision-making microprocessor. The SPROC is provided with a non-interrupt structure where data flow is through a multiported central memory. The SPROC is also programmed in an environment which requires nothing more than graphic entry of a block diagram of the user's design. In automatically implementing the block diagram into silicon, the SPROC programming/development environment accounts for and provides software connection and interfaces with a host microprocessor. The programming environment preferably includes: a high-level computer screen entry system which permits choosing, entry, parameterization, and connection of a plurality of functional blocks; a functional block cell library which provides source code representing the functional blocks; and a signal processor scheduler/compiler which uses the functional block cell library and the information entered into the high-level entry system to compile a program and to output source program code for a program memory and source data code for the data memory of the (SPROC), as well as a symbol table which provides a memory map which maps SPROC addresses to variable names which the microprocessor will refer to in separately compiling its program.

REFERENCES:
patent: 4724521 (1988-02-01), Carron et al.
patent: 4750116 (1988-06-01), Pham et al.
patent: 4972314 (1990-11-01), Getzinger et al.
patent: 5151984 (1992-09-01), Newman et al.
patent: 5287511 (1994-02-01), Robinson et al.

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