System for distributed multiprocessor communication

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36492798, G06F 1516

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active

054349702

ABSTRACT:
A tightly coupled interprocessor communication system based on a common shared resource circuit and adapted particularly to a multiprocessing system including 2.sup.N processors. A local control circuit is connected to each processor and a shared resource circuit is tightly coupled through the local control circuits to each processor. The shared resource circuit includes a shared semaphore register, a shared information register and a read and increment circuit which can be used to increment the contents of a shared information register as a single instruction. The local control circuit includes an issue control circuit used to determine when a transaction with the shared resource circuit is permitted, a circuit which generates a command to the shared resource circuit when the transaction is permitted and a real time clock.

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patent: 4754398 (1988-06-01), Pribnow
Patent Abstracts of Japan, vol. 13, No. 700 (P-829) (3418) 17 Feb. 1989 and JP, A, 63257048 24 Oct. 1983 (see abstract).

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