Metal fusion bonding – Including means to apply flux or filler to work or applicator
Reexamination Certificate
2006-04-18
2006-04-18
Edmondson, Lynne R. (Department: 1725)
Metal fusion bonding
Including means to apply flux or filler to work or applicator
C228S025000, C228S032000, C228S051000
Reexamination Certificate
active
07028879
ABSTRACT:
A semiconductor die having multiple solder bumps, each having a diameter less than about 100 microns, and the method for making such a die are described. The pitch between the solder bumps is less than 100 microns. A thermal solder jet apparatus is utilized to deposit solder material to form the solder bumps. The apparatus includes a print head having a plurality of solder ejection ports. Each ejection port has an associated gas ejection conduit connected to a chamber containing one or more hydride films for producing hydrogen gas. The hydrogen gas is utilized to force the ejection of the solder material from the ejection port. A controller controls and choreographs the movements of the movable substrate and movable drive so as to accurately deposit material in desired locations on the semiconductor dies.
REFERENCES:
patent: 3959047 (1976-05-01), Alberts et al.
patent: 4532530 (1985-07-01), Hawkins
patent: 4828886 (1989-05-01), Heiber
patent: 5229016 (1993-07-01), Hayes
patent: 5240878 (1993-08-01), Fitzsimmons et al.
patent: 5364011 (1994-11-01), Baker et al.
patent: 5377902 (1995-01-01), Hayes
patent: 5457345 (1995-10-01), Cook et al.
patent: 5461257 (1995-10-01), Hundt
patent: 5495661 (1996-03-01), Gromer et al.
patent: 5629838 (1997-05-01), Knight et al.
patent: 5642261 (1997-06-01), Bond et al.
patent: 5681757 (1997-10-01), Hayes
patent: 5693572 (1997-12-01), Bond et al.
patent: 6029896 (2000-02-01), Self et al.
patent: 6074895 (2000-06-01), Dery et al.
patent: 6117299 (2000-09-01), Rinne et al.
patent: 6122177 (2000-09-01), Kitano et al.
patent: 6133634 (2000-10-01), Joshi
patent: 6136689 (2000-10-01), Farrar
patent: 6196443 (2001-03-01), DiGiacomo
patent: 6324973 (2001-12-01), Rossmeisl et al.
patent: 6394334 (2002-05-01), Brouillette et al.
patent: 6435396 (2002-08-01), Eldridge
Solder Transfer Technique for Flip-Chip and Electronic Assembly Applications, Karl J. Puttlitz, et al., IEEE Transactions on Components, Packaging and Manufacturing Technology, Part C, vol. 21, No. 3, Jul., 1998.
MicroJet Printing of Solder and Polymers for Multi-Chip Modules and Chip-Scale Packages, Donald J. Hayes et al., MicroFab Technologies, Inc., IMPAS '99.
Self-Aligned Controlled Collapse Chip Connect (SAC4), L. Pfeiffer et al., J. Electrochem. Soc.: Solid-State Science and Technology, Nov. 1987.
Review of Flip Chip Bonding, Vincent C. Marcotte, et al., IBM East Fishkill Facility.
Solder Jet Printing of Micropads and Vertical Interconnects, David B. Wallace, et al., www.microfab.com/paper/smta97/smta97.htm, (Aug. 12, 2000).
Combination Process for Final Metal Lines and Metal Terminals, Research Disclosure, No. 34232, Kenneth Mason Publications Ltd., England (Oct. 1992/753).
Process for High Density of Chip Terminals on Large Wafers, Research Disclosure, 34625 Kenneth Mason Publications Ltd., England (Feb. 1993/97).
Key Process Controls for Underfilling Flip Chips, Alec J. Babiarz et al., Solid State Technology, 1997 by PennWell Publishing Company.
Mark's Standard Handbook for Mechanical Engineers, Tenth Edition, Eugene A. Avallone, et al.
Flow of gases through tubes and orifices, David G. Worden, Scientific Foundations of Vacuum Technique, Saul Dushman.
Sorption of gases by “active” charcoal, silicates (including glasses), and cellulose, “Scientific Foundations of Vacuum Technique”, J. Wiley and Sons (1962).
Electronic Materials Handbook, vol. 1, Packaging, pp. 301, 440.
Technology Challenges for Advanced Interconnects, James G. Ryan et al, Conference Proceedings ULSI XIII©1998 Materials Research Study.
Microjet Printing of Solder and Polymers for Multi-Chip Modules and Chip-scale Packages, MicroFab Technologies, IMPAS 199.
Anonymous, “Combination Process for Final Metal Lines and Metal Terminals,” Kenneth Mason Publication Ltd., Research Disclosure No. 34232, England (Oct. 1992) 1 page.
Anonymous, “Pr5ocess for High Density of Chip Terminals on Large Wafers,” Kenneth Mason Publications Ltd., Research Disclosure No. 02, England (Feb. 1992) 1 page.
Babiarz, A.J., “Key Process Controls for Underfilling Flip Chips,”Solid State Technology, 40(4) (Apr. 1997), 77-8, 81, 83.
Jones, P, et al., “Bumped Wafers, Worth Their Weight in Gold?,”Advanced Packaging, 8(1) (Jan. 1997) 54-57.
Marcotte, V.C., “Review of Flip Chip Bonding,”Proceeding of the 2nd ASM International Electronic Materials and Processing Congress, Apr. 24-28, 1989, Philadelphia, PA (1989)73-81.
Minges, Merril,Packaging Electronic Materials Handbook, vol. 1, ASM International (1989) 301, 440.
Puttilitz, Karl J., et al., “Solder Transfer Technique for Flip-Chip and Electronic Assembly Applications,”IEEE Transactions on Components, Packaging and Manufacturing Technology, Part C, vol. 21, No. 3 (Jul. 1998) 182-188.
Ryan, J.G., “Technology Challenges for Advanced Interconnects,”Advanced Metallization and Interconnect Systems for ULSI Applications in 1997, Sep. 20-Oct. 2, 1997, San Diego, CA 399-404.
Eldridge Jerome
Farrar Paul A.
LandOfFree
System for depositing connection sites on micro C-4... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System for depositing connection sites on micro C-4..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System for depositing connection sites on micro C-4... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3580383