System for controlling access to a common bus in a computer syst

Details System for controlling access to a common bus in a computer syst System for controlling access to a common bus in a computer syst

1980-05-13

1983-06-28

Ruggiero, Joseph F.

Boots, shoes, and leggings

G06F 946

Patent

active

043909442

ABSTRACT:
Circuitry for affording access to a common passive bus by a plurality of computer devices connected to the bus. Each of the devices is provided with the circuitry, which operates in three sequential phases: a bus request phase, an address phase and a data transfer phase. Circuitry interconnecting the bus connections for permitting a device to initiate the bus request phase only if all devices superior to it are not in the bus request phase thereby establishing a priority ranking among the devices. The circuitry also includes a call back system wherein if a given device is unready to receive data when addressed by a source device, such device will, when it is ready, call back the source device that was previously and unsuccessfully attempting to transfer data to it. The call back system is also adapted to permit a device to wait for response from a single one of the other devices until such other device responds and then to call back other devices that tried to address it while it was waiting for a response from the single device.

REFERENCES:
patent: 3993981 (1976-11-01), Cassarino
patent: 3995258 (1976-11-01), Barlow
patent: 4030075 (1977-06-01), Barlow
patent: 4096571 (1978-06-01), Vander Mey
patent: 4229791 (1980-10-01), Levy

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