System for configuring memory space for storing single decoder t

Details System for configuring memory space for storing single decoder t System for configuring memory space for storing single decoder t

1995-09-18

1999-01-05

Lee, Thomas C.

Coded data generation or conversion

Digital code to digital code converters

Tree structure

341 65, 341 67, 395388, 395834, 395872, G06F 930

Patent

active

058570888

ABSTRACT:
Single-instruction multiple-data is a new class of integrated video signal processors especially suited for real-time processing of two-dimensional images. The single-instruction, multiple-data architecture is adopted to exploit the high degree of parallelism inherent in many video signal processing algorithms. Features have been added to the architecture which support conditional execution and sequencing--an inherent limitation of traditional single-instruction multiple-data machines. A separate transfer engine offloads transaction processing from the execution core, allowing balancing of input/output and compute resources--a critical factor in optimizing performance for video processing. These features, coupled with a scalable architecture allow a united programming model and application driven performance.

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