System for checking the validity of two byte operation code by m

Details System for checking the validity of two byte operation code by m System for checking the validity of two byte operation code by m

1992-12-23

1995-04-18

Bowler, Alyssa H.

Boots, shoes, and leggings

395425, 395375, 3642594, 3642624, 3642628, 364DIG1, 3649462, 3649466, 3649475, G06F 932, G06F 928

Patent

active

054086744

ABSTRACT:
A mapping system for mapping a plurality of two byte operation code series into a control store where in each two byte operation code the first byte identifies the series in which that two byte operation code is included and the second byte identifies that specific operation code within the identified series, the mapping system comprising a first register for storing the first and second bytes of a two byte operation codes, a first control store for storing control word for the two byte operation codes, a first means for generating, from the first and second bytes stored in the first register, a first control store address for the first control store thereby providing access to the control word for processing the two byte operation code store in the first register and a second means for generating, from the first and second bytes stored in the first register, a first signal when an invalid two byte operation code has been stored in the first register for processing, the first signal invalidating the processing of the two byte operation code stored in the first register including any processing of the control word accessed by the first control store in response to the first control store address generated by the first means.

REFERENCES:
patent: 3949370 (1976-04-01), Reyling, Jr. et al.
patent: 4338663 (1982-07-01), Strecker et al.
patent: 4443865 (1984-04-01), Schultz et al.
patent: 4449184 (1984-05-01), Pohlman, III et al.
patent: 4931989 (1990-06-01), Rhodes, Jr. et al.
patent: 5233695 (1993-08-01), Miyoshi
patent: 5321821 (1994-06-01), Itomitsu et al.

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