System for cache space allocation using selective addressing

Details System for cache space allocation using selective addressing System for cache space allocation using selective addressing

1990-10-09

1992-07-21

Fears, Terrell W.

Static information storage and retrieval

Associative memories

Ferroelectric cell

365207, 36523001, G11C 1300

Patent

active

051329271

ABSTRACT:
A system for folding the address space of a reserved segment of a high speed memory into a designated part of the address space of a cache memory included in the high speed memory. Folding information for distinguishing between cache entries that have been folded from reserved segments and those that normally map into a designated segment of the high speed memory is stored. The folding information is utilized to determine whether a cache miss occurs when the designated segment of the cache memory is accessed.

REFERENCES:
patent: 4922461 (1990-05-01), Hayakawa et al.

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