System for arraying surface mount grid array contact pads to...

Details System for arraying surface mount grid array contact pads to... System for arraying surface mount grid array contact pads to...

2007-01-09

2007-01-09

Cuneo, Kamand (Department: 2841)

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

C361S780000, C361S794000, C174S255000, C174S261000

Reexamination Certificate

active

10442355

ABSTRACT:
A surface mount grid array implemented on a PCB (printed circuit board) optimized for trace escape routing for the PCB. The surface mount grid array includes a plurality of connection blocks, with each connection block including an array of pins and an array of vias, wherein the pins and vias are configured to communicatively connect an integrated circuit device to a plurality of traces of the PCB. The connection blocks are disposed in a tiled arrangement, wherein the connection blocks implement a plurality of trace escape channels along connection block boundaries. The trace escape channels are configured for routing traces from inner pins of the surface mount grid array to a periphery of the surface mount grid array.

REFERENCES:
patent: 6111756 (2000-08-01), Moresco
patent: 6198635 (2001-03-01), Shenoy et al.

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