System for architecture and resource specification and...

Data processing: software development – installation – and managem – Software program development tool – Translation of code

Reexamination Certificate

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Details

C717S136000, C717S138000, C717S139000, C717S140000, C717S114000, C717S146000, C713S002000, C713S002000, C716S030000

Reexamination Certificate

active

10072212

ABSTRACT:
Electronic design automation tool specifies an architecture at a system level and its component (which include intellectual property (IP) cores like embedded processors, arithmetic logic units (ALU), multipliers, dividers, embedded memory element, programmable logic cells, etc.); specifies IP-cores and their interface; and understands IP-cores and functions via their interface. Further, techniques are provided for modeling the timing behavior of a function or functional block without drawing a timing diagram; understanding the interface behavior of a function block which captures the timing waveforms; specifying virtual functions which are built using basic functional units and their timing behavior; parsing and creating an internal graphical form for analyzing a specification for compilation; matching the components in the architecture specification and their instantiation to map the computations in the input graph produced from an application; and mapping the specification onto the target's components.

REFERENCES:
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patent: 6718520 (2004-04-01), Merryman et al.
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patent: 2002/0038401 (2002-03-01), Zaidi et al.
patent: 2003/0105620 (2003-06-01), Bowen
patent: 2004/0013210 (2004-01-01), Bollano et al.
Smith, et al., “An Architecture Design and Assessment System for Software/Hardware Codesign”, IEEE, 1985, pp. 417-424.

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