System for arbitrating for access on VME bus structures

Details System for arbitrating for access on VME bus structures System for arbitrating for access on VME bus structures

1992-05-12

1994-06-14

Chun, Debra A.

Boots, shoes, and leggings

364DIG1, 3642292, 3642304, 3642404, 3642428, 36424292, G06F 1337

Patent

active

053218183

ABSTRACT:
System for providing self-selection arbitration among a plurality of slave processors connected to a VME back plane. The slave processors are connected to a common ID bus, interrupt line, and acknowledge bus. Slave processors contend for access to the VME back plane by asserting an interrupt level unique to a group of slave processors on the interrupt line. Simultaneously, the contending slave processors apply their respective addresses to the ID bus. When a contending slave processor receives an acknowledge over the acknowledge bus from a master processor, and senses its own address on the ID bus, it has successfully won the right to transmit data over the data bus.

REFERENCES:
patent: 4484273 (1984-11-01), Stiffler et al.
patent: 4633394 (1986-12-01), Georgiou et al.
patent: 4785394 (1988-11-01), Fischer
patent: 4897833 (1990-01-01), Kent et al.
patent: 5083259 (1992-01-01), Maresh et al.
patent: 5175825 (1992-12-01), Starr
patent: 5263163 (1993-11-01), Holt et al.
Design of Multiprocessor Buses by Del Corso et al, Chapters 4 and 5, pp. 117-205 (note in particular pp. 138-143).

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