System for and method of forming via holes by use of...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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Details

C257SE21577, C438S637000, C438S675000

Reexamination Certificate

active

11026365

ABSTRACT:
In a shadow mask vapor deposition system, a first conductor is vapor deposited on a substrate and an insulator is vapor deposited on the first conductor. A second conductor is then vapor deposited on at least the insulator. The insulator layer is plasma etched either before or after the vapor deposition of the second conductor to define in the insulator layer a via hole through which at least a portion of the first conductor is exposed. An electrical connection is established between the first and second conductors by way of the via hole.

REFERENCES:
patent: 4853345 (1989-08-01), Himelick
patent: 6031289 (2000-02-01), Fulford et al.
patent: 2001/0053586 (2001-12-01), Lee et al.
patent: 2002/0109521 (2002-08-01), Almonte et al.
patent: 2003/0193285 (2003-10-01), Kim
patent: 2003/0218254 (2003-11-01), Kurimoto et al.
patent: 2004/0003775 (2004-01-01), Kim
patent: 2004/0137719 (2004-07-01), Jin
patent: 2006/0141763 (2006-06-01), Brody et al.

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