Electrical computers and digital processing systems: processing – Processing architecture – Superscalar
Patent
1997-12-05
1999-10-26
An, Meng-Ai T.
Electrical computers and digital processing systems: processing
Processing architecture
Superscalar
712215, G06F 900
Patent
active
059745258
ABSTRACT:
A technique for increasing the number of physical segment registers by renaming logical segment registers into a larger register space. The remapping of the segment registers allows for instructions accessing the segment registers to be executed non-serially. The renaming of segment registers is achieved by assigning a shadow register to a segment register name. Thus, a pair of registers are physically available for a specified logical register in an instruction set to be renamed. Two bits, designated as the PSEG and SPEC bits, are used to control the remapping.
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Jain Satchitanand
Lin Derrick Chu
Modi Nimish H.
Tagare Varsha P.
Vakkalagadda Ramamohan Rao
An Meng-Ai T.
Intel Corporation
Monestime Mackly
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