System for allowing a simm module with asymmetric addressing to

Details System for allowing a simm module with asymmetric addressing to System for allowing a simm module with asymmetric addressing to

1995-05-01

1997-02-04

Yoo, Do Hyun

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

365193, 36523002, G11C 800

Patent

active

056006047

ABSTRACT:
A circuit for allowing a memory module with an asymmetric addressing scheme to effectively operate with a memory controller which a symmetric address scheme is disclosed. The circuit includes a demultiplexer for receiving at least a last address bit from the memory controller and generating a plurality of control signals and a decoder. The decoder includes a plurality of decoder units. Each of the decoder units includes logic for receiving one of the plurality of control signals, a first strobe signal and a second strobe signal from the memory controller. Each of the decoder units also selectably provides a decoded second strobe signal responsive to the demultiplexer.

REFERENCES:
patent: 4792929 (1988-12-01), Olson et al.
patent: 5305277 (1994-04-01), Derwin et al.
patent: 5392252 (1995-02-01), Rimpo et al.

Affiliated with

Also associated with

Rating

System for allowing a simm module with asymmetric addressing to does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System for allowing a simm module with asymmetric addressing to , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System for allowing a simm module with asymmetric addressing to will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-685977