System console terminal for fault tolerant computer system

Details System console terminal for fault tolerant computer system System console terminal for fault tolerant computer system

1995-10-20

1997-12-02

Beausoliel, Jr., Robert W.

39518401, G06F 1502

Patent

active

056945418

ABSTRACT:
A console terminal arrangement is disclosed for use in connection with a fault-tolerant computer system including a plurality of processing modules, at least some of the processing modules including an operator input/output interface for receiving operator input from an operator input device and operator display output on an operator display device. The console terminal arrangement facilitates management of all of the processing modules by a single operator from a single location. The arrangement includes a console terminal and a plurality of processing module interfaces interconnected by a network. The console terminal includes an operator input device and an operator display device, and generates operator input messages including processing module management information generated by the operator input device in response to inputs provided by an operator and an address identifying one of the processing modules to be managed by the console terminal. The console terminal further generates and displays video images in response to video image data received in messages from the processing modules. Each processing module interface receives operator input messages generated by the console terminal which include an address identifying the processing module connected to the processing module interface and provide the processing module management information to the operator input/output interface to control the processing module. In addition, each processing module interface receives video information from the associated processing module's operator input output device and generates a message including the video information and an address identifying the console terminal. The network carries messages generated by the console terminal and the processing module interfaces in accordance with the addresses contained in the respective messages.

REFERENCES:
patent: 4720782 (1988-01-01), Kovalcin
patent: 5247517 (1993-09-01), Ross et al.
patent: 5315711 (1994-05-01), Borone et al.
patent: 5347646 (1994-09-01), Hirosawa et al.

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