Static information storage and retrieval – Addressing – Sync/clocking
Patent
1997-09-05
2000-02-22
Nelms, David
Static information storage and retrieval
Addressing
Sync/clocking
36523003, 36523006, 36523008, G11C 800
Patent
active
060288167
ABSTRACT:
A system and a semiconductor device for realizing such a system are disclosed. The system uses at least a semiconductor device for retrieving an input signal in synchronism with an internal clock generated from an external clock, the input signal remaining effectively in synchronism with the external clock. Even in the case where a phase difference develops between a clock and a signal at the receiving end, or even in the case where a phase difference develops between a clock input circuit and other signal input circuits in the semiconductor device at the receiving end, data can be transferred at high speed. Each input circuit of the semiconductor device at the receiving end includes an input timing adjusting circuit for adjusting the phase of the clock applied to the input circuit in such a manner that the input circuit retrieves the input signal in an effective and stable state. In the case where the skew between the input signals is small as compared with the skew between the input signals and the clock, an input timing adjusting circuit is shared by a plurality of the input circuits.
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Hatakeyama Atsushi
Matsuzaki Yasurou
Mochizuki Hirohiko
Nakano Masao
Okajima Yoshinori
Fujitsu Limited
Nelms David
Nguyen Tuan T.
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