Data processing: structural design – modeling – simulation – and em – Structural design
Reexamination Certificate
2006-04-18
2006-04-18
Rodriquez, Paul L. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Structural design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07031887
ABSTRACT:
A method is provided for exploring alternative architectures for partitioning computer system resources to execute multiple task specifications. An initial master task graph is formed from the multiple task specifications, the initial master task graph including at least one hierarchical task with pointers to either AND sub-task graphs or XOR sub-task graphs. The initial master task graph is processed to provide a selected number of final master task graphs, each of the final master task graphs comprising a list of AND task graphs. A family of architectures is generated for each of the final master task graphs, each of the architectures generated for a given master task graph being capable of executing every AND task graph included therein. The degree of resemblance in composition, functional capability or performance resulting between architectures from different master task graphs is a function of the correlation between the contents of these master task graphs and not of concern to the user of the aforementioned method.
REFERENCES:
patent: 6230303 (2001-05-01), Dave
patent: 6289488 (2001-09-01), Dave et al.
patent: 6305006 (2001-10-01), Markov
patent: 0682311 (1995-05-01), None
patent: 1158405 (2001-05-01), None
Wolf, Wayne and Xie, Yuan; “Allocation and scheduling of conditional task graph in hardware/software co-synthesis”, Mar. 2001, Proceedings of the conference on Design, Automation and Test in Europe, pp. 620-625.
Dick, Robert P. and Jha, Niraj K.; “MOGAC: A multiobjective genetic algorithm for the co-synthesis of hardware-software embedded systems”, Nov. 1997, Digest of Technical Papers, 1997 IEEE/ACM International Conference on Computer-Aided Design.
Kalavade, Asawaree and Subrahmanyam, P. A.; “Hardware/software partitioning for multifunction systems”, Sep. 1998, IEEE Transactions on Computer-Aided Design of Integrated Circuit and Systems, vol. 17, No. 9.
Kalavade, Asawaree; Subrahmanyam, P.A.; “Hardware/Software Partitioning for Multifunction Systems”, IEEE Transactions on computer-aided design of integrated circuits and systems, vol. 17, No. 9, Sep. 1998.
Search Report under Section 17, Dated Jan. 23, 2003.
Biswas Chaitali
Jain Rajiv
Su Alan Peisheng
Agilent Technologie,s Inc.
Guill Russ
Rodriquez Paul L.
LandOfFree
System architecture synthesis and exploration for multiple... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System architecture synthesis and exploration for multiple..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System architecture synthesis and exploration for multiple... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3546087