System architecture for improved network input/output processing

Details System architecture for improved network input/output processing System architecture for improved network input/output processing

1995-03-31

1997-08-19

Harvey, Jack B.

39520002, 395825, 395826, 395309, 395733, 39520064, H01J 300

Patent

active

056597940

ABSTRACT:
A network input/output processing system for sending and receiving messages between a large scale computer system and associated communications networks. Executive operating system services provide access to a control table, an input queue, and an output queue stored in the computer system's main memory. A network input/output processor responds to requests by application programs, through a communications program, for receiving input from and sending output to a network, concurrently with requests to communicate with directly attached peripheral devices such as disk drives, tape drives, and printers. The network input/output processor receives initialization, reset, and termination requests via the control table. Requests to receive input are received from the input queue. Input data is stored into buffers as directed by the input request. Requests to send output are received from the output queue. Output data is read from the buffers as directed by the output request. Executive operating system services provide for control of input data transfers and output data transfers. Special purpose Instruction Processor instructions provide the capability to build control programs for processing input and output messages used by the network input/output processor to effect message transfers, thereby minimizing host instruction pathlength for communications I/O. The system architecture minimizes internal data copy between processes by using transferable buffers as communications buffers.

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