Computer graphics processing and selective visual display system – Display peripheral interface input device
Patent
1997-11-13
2000-07-04
Shalwala, Bipin H.
Computer graphics processing and selective visual display system
Display peripheral interface input device
345133, 345327, 348446, 348447, G09G 504, G09G 536, H04N 701
Patent
active
060845686
ABSTRACT:
A device performs both 2-tap and 3-tap flicker filtering of non-interlaced lines of computer graphics data to form interlaced lines. The device includes a data packer, a data unpacker, and a filter circuit. The filter circuit combines lines that it receives to form filtered lines. The data packer writes the filtered lines to line buffers while the data unpacker reads the lines stored in the line buffers. The read lines are either sent to the filter circuit for further filtering or are outputted to be displayed as interlaced lines. Both 2-tap and 3-tap flicker filtering can be accomplished by varying the order and/or number of read, write, and filter operations.
REFERENCES:
patent: 5387940 (1995-02-01), Kwok et al.
patent: 5455628 (1995-10-01), Bishop
patent: 5610661 (1997-03-01), Bhatt
patent: 5781241 (1998-07-01), Donovan
Herz William S.
Premi Reena
Tjandrasuwita Ignatius B.
Lewis David L
S3 Incorporated
Shalwala Bipin H.
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