Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2003-09-22
2004-09-21
Young, Brian (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S136000, C341S155000
Reexamination Certificate
active
06795008
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is related to digital to analog converters.
2. Background Art
An analog section of digital-to-analog converters (DACs) usually receives complementary drive signals that are generated using a switch driver circuit. The switch driver circuit receives digital signals and generates the drive signals therefrom. The analog section uses the received drive signals to generate analog signals representative of the digital signals.
A problem can arise when a switch is turned off. The released charge from the switch being turned off is injected into an output node, which causes glitches (e.g., temporary peaks and values, for example spikes) in the analog signals. Further, a capacitive coupling between a control node and the output node can cause additional glitches. The glitches can lower the signal-to-noise ratio (SNR) at an output node. Performance of the DAC can be severely hampered if the glitches cause the SNR to cross a threshold level.
Therefore, what is needed is a system and method that substantially eliminate glitches in an output analog signal.
BRIEF SUMMARY OF THE INVENTION
Embodiments of the present invention provide a system that substantially eliminates glitches. The system includes first and second drivers configured to receive first and second respective digital signals and generate first and second respective drive signals therefrom. The first and second drivers are coupled between first and second nodes. The system also includes first and second switches configured to receive respective ones of the first and second drive signals and generate first and second respective analog signals therefrom. A difference in power signal values received at respective ones of the first and second nodes is set to a predetermined amount, such that a glitch in the first and second analog signals is substantially eliminated.
Other embodiments of the present invention provide a method for substantially eliminating glitch. The method includes coupling first and second drivers between first and second nodes receiving first and second power supply values, such that respective swing values in respective first and second drive signals is limited. The method also includes driving respective first and second switches with the first and second drive signals to produce first and second respective analog signals. The limit in the swing values in the drive signals substantially eliminates glitches in first and second analog signals.
Still other embodiments of the present invention provide a method for substantially eliminating glitch. The method includes coupling first and second drivers between ground and a power supply, such that a swing value in respective first and second drive signals is limited. The method also includes driving respective first and second switches with the first and second drive signals to produce first and second respective analog signals. The limit in the swing value in the drive signals substantially eliminates glitches in first and second analog signals.
Further embodiments, features, and advantages of the present inventions, as well as the structure and operation of the various embodiments of the present invention, are described in detail below with reference to the accompanying drawings.
REFERENCES:
patent: 6340939 (2002-01-01), Dedic
patent: 6344816 (2002-02-01), Dedic
patent: 2003/0043062 (2003-03-01), Dedic et al.
patent: 2003/0190007 (2003-10-01), Dedic et al.
Nguyen John B
Sterne Kessler Goldstein & Fox PLLC
Young Brian
LandOfFree
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