Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2011-03-08
2011-03-08
Ho, Tu-Tu V (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S693000, C257S724000, C257SE23079
Reexamination Certificate
active
07902654
ABSTRACT:
In one particular embodiment, an integrated circuit includes a package and a substrate electrically and physically coupled to the package. The package includes a first pin, a second pin, and metallization coupling the first pin to the second pin. The substrate is coupled to the package via the first pin and the second pin. The substrate includes a plurality of power domains and a power control unit. The second pin of the package is coupled to a particular power domain of the plurality of power domains. The power control unit includes logic and a switch, where the switch includes a first terminal coupled to a voltage supply terminal, a control terminal coupled to the logic, and a second terminal coupled to the first pin of the package. The logic selectively activates the switch to distribute power to the particular power domain via the metallization of the package.
REFERENCES:
patent: 6118328 (2000-09-01), Morikawa
patent: 6242896 (2001-06-01), Nieberger
patent: 6337580 (2002-01-01), Muramatsu
patent: 6404172 (2002-06-01), May
patent: 6499658 (2002-12-01), Goetz et al.
patent: 6864708 (2005-03-01), Takahashi et al.
patent: 6879142 (2005-04-01), Chen
patent: 6979982 (2005-12-01), Herbert
patent: 7057446 (2006-06-01), Choi et al.
patent: 7075280 (2006-07-01), May
patent: 7088002 (2006-08-01), Jensen
patent: 7098632 (2006-08-01), Chen et al.
patent: 7187527 (2007-03-01), Su et al.
patent: 7372161 (2008-05-01), Lin et al.
patent: 7393604 (2008-07-01), Rocke et al.
patent: 7405497 (2008-07-01), Jacobs et al.
patent: 7508686 (2009-03-01), May
patent: 2002/0011518 (2002-01-01), Goetz et al.
patent: 2002/0074161 (2002-06-01), Jensen
patent: 2003/0025130 (2003-02-01), Takahashi et al.
patent: 2004/0108890 (2004-06-01), Choi et al.
patent: 2004/0232899 (2004-11-01), Herbert
patent: 2005/0058857 (2005-03-01), Rocke et al.
patent: 2005/0104177 (2005-05-01), Lin et al.
patent: 2005/0225177 (2005-10-01), Jacobs et al.
patent: 2006/0044718 (2006-03-01), Su et al.
patent: 2006/0061383 (2006-03-01), Huang et al.
patent: 2007/0002600 (2007-01-01), May
patent: 2007/0008011 (2007-01-01), Thurston
patent: 2005038920 (2005-04-01), None
patent: 2006026627 (2006-03-01), None
Mutoh S et al: “A 1 V Milti-Threshold Voltage CMOS DSP With an Efficient Power Management Technoque for Mobile Phone Application” Solid-State Circuits Conference, 1996. Digest FO Technical Papers. 42nd ISSCCL, 1996 IEEE International San Francisco, CA, US Feb. 8-10, 1996, New York, NY, USA, IEEE, US, (Feb. 8, 1996), pp. 168-169, 438, XP01056440.
International Search Report-PCT/US07/067227, International Search Authority-Eurpean Patent Office-Oct. 1, 2007.
Written Opinion-PCT/US07/067227, International Search Authority-European Patent Office-Oct. 1, 2007.
Andreev Boris Dimitrov
Choa-Eoan Lew G.
Gagne Justin Joseph Rosen
Shi Chunlei
Toms Thomas R.
Gallardo Michelle
Ho Tu-Tu V
Kamarchik Peter M.
Qualcomm Incorporated
Velasco Jonathan T.
LandOfFree
System and method of silicon switched power delivery using a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method of silicon switched power delivery using a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method of silicon switched power delivery using a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2746336