Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
Reexamination Certificate
2006-04-04
2006-04-04
Tsai, Henry W. H. (Department: 2181)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Commitment control or register bypass
C712S023000
Reexamination Certificate
active
07024542
ABSTRACT:
A processor system and method that reduces the number of register value copying made from alias registers to corresponding real (architectural) registers. One method entails not performing an alias register to real register copying if the incoming instruction does not designate a real register. Another method entails delaying alias register to real register copying until the corresponding reorder buffer (ROB) entry is actually written to. Yet another method entails not performing an alias register to real register copying if the ROB entry is the same as the existing ROB entry. And, still another method entails further delaying or stalling the allocation of an ROB entry.
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Gonzalez Antonio
Ronen Ronny
Savransky Guillermo
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Tsai Henry W. H.
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