Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2006-09-19
2006-09-19
Knight, Anthony (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C703S013000, C716S030000
Reexamination Certificate
active
07110929
ABSTRACT:
A simulation template and method therefor is disclosed that modifies a SPICE netlist that describes a circuit in order to provide customized or pre-installed additional analysis. More specifically, a simulation template is an interactive command language (ICL) script that has embedded instructions telling a netlist where to insert information and which options are to be provided. It is used to expand SPICE beyond the traditional limitations of the basic alternating current (AC), direct current (DC), and transient analysis by allowing parameter variations and multiple simulations passes to be run under one analysis umbrella. Such additional analysis employing parameter variations and multiple analysis passes include sensitivity analysis, root means square (RSS) analysis, extreme value analysis (EVA) and worst case sensitivity (WCS), to name a few. The simulation template includes a routine to add to a netlist for altering circuit parameter values of the circuit design in a pre-determined manner, a routine to add to the netlist for performing simulations of the circuit design for respective altered circuit parameter values to arrive at respective selected vector measurements, and a routine to add to the netlist for manipulating at least one of the vector measurements in accordance with the pre-determined analysis.
REFERENCES:
patent: 4656603 (1987-04-01), Dunn
patent: 4675832 (1987-06-01), Robinson et al.
patent: 4813013 (1989-03-01), Dunn
patent: 4829446 (1989-05-01), Draney
patent: 4878179 (1989-10-01), Larsen et al.
patent: 4965741 (1990-10-01), Winchell et al.
patent: 5019992 (1991-05-01), Brown et al.
patent: 5111413 (1992-05-01), Lazansky et al.
patent: 5164911 (1992-11-01), Juran et al.
patent: 5278769 (1994-01-01), Bair et al.
patent: 5297066 (1994-03-01), Mayes
patent: 5325309 (1994-06-01), Halaviati et al.
patent: 5446676 (1995-08-01), Huang et al.
patent: 5463563 (1995-10-01), Bair et al.
patent: 5471399 (1995-11-01), Tanaka et al.
patent: 5544067 (1996-08-01), Rostoker et al.
patent: 5623418 (1997-04-01), Rostoker et al.
patent: 5629857 (1997-05-01), Brennan
patent: 5721959 (1998-02-01), Nakamura et al.
patent: 5787268 (1998-07-01), Sugiyama et al.
patent: 5798938 (1998-08-01), Heikes et al.
patent: 5801958 (1998-09-01), Dangelo et al.
patent: 5838947 (1998-11-01), Sarin
patent: 5889677 (1999-03-01), Yasuda et al.
patent: 5978476 (1999-11-01), Redman et al.
patent: 5982899 (1999-11-01), Probst
patent: 6601024 (2003-07-01), Chonnad et al.
patent: 6842727 (2005-01-01), Hayashi
Handbook of Mathematical Sciences 5th Edition, by William H. Beyer, CRC Press, ISBN 0-8493-0655-8, 1978, p. 726 Mean Deviation, and p. 727 Standard Deviation, and p. 727 Root Mean Square.
The Computer Science and Engineering Handbook, by Allen B. Tucker, Jr., CRC Press, ISBN 0-8493-2909-4, 1996, p. 862-863 sensitivity analysis, and p. 2348 simulation models.
Table of Component Failure Modes, Items 1-33.
Goodall, S. Analog/Mixed Signal Fault Diagnosis Algorithm and Tool Review, AutoTestCon Proceedings 1994,m 351-359, USA.
Simpson, W.R. and Sheppard, J.W., Fault Isolation in an Integrated Diagnostic Environment. IEEE Design & Test, Mar. 1993, 52-66, vol. 10, No. 1, USA.
Pan, C.Y. and Cheng, K.T., Test Generation For Linear, Time Invariant Analog Circuits 3rd IEEE Intl. Mixed-Signal Testing Workshop, Jun. 3-6, 1997, 98-100, USA.
Dill, H., A Comparison of Conventional and Inference Model Based TPS Development Processes, AutoTestCon, 1995, 160-168, USA.
Dill, H., Bratton, K., Sparr, C., and Pitzen, L., Application of Analog & Mixed Signal Simulation Techniques to the Synthesis and Sequencing of Diagnostic Tests.
UL Standards-On-Diskette User Guide, Underwriters Laboratories, Inc., ISBN 0-7629-0093-8, 1996, 17, USA.
Nagel, L.W. and Pederson, DO. Spice 2: A Computer Program to Simulate Semiconductor Circuits, ERL Memo No. ERL-M520, University of California, Berkeley, May 9, 1975.
Johnson, B., Quarles, T., Newton, AR., Pdeerson, DO., Sangiovanni-Vincentelli, A. Spice 3 Version 3f User's Manual, University of CA, Berkeley Oct. 1992.
IsSpice4 User's Guide, Intusoft, 1997, USA, Only 3 Pages Submitted (Bibliographic Data).
Cox., F., Kuhn, W., Murray, J., and Tynor, S., Code-Level Modeling in XSPICE, Proceedings of the 1992 Intl. Syp. of Circuits and Systems, May 1992, USA.
XSPICE User's Manual, Georgis Institue of Research, Georgia Institute of Technology, 1992, USA.
Hamida, NB., Saab, K., Marche, D., Kaminska, B., and Quesnel, G., LIMSoft: Automated Tool for Design and Test Integration of Analog Circuits, 2nd IEEE International.
Sandler, S., SMPS Simulation with SPICE, 1997, McGraw-Hill, USA, Only 3 Pages Submitted (Biblio Data).
Dill, H. Bratton, K., Sparr, C., and Pitzen, L., Application of Analog & Mixed Signal Simulation Techniques to the Synthesis and Sequencing of Diagnostic Tests.
Hamida, NB., Saab, K., Marche, D., Kaminska, B., and Quesnel, G., LIMSoft: Automated Tool for Design and Test Integration of Analog Circuits, 2nd IEEE International Test Conference, pp. 571-580, 1996, Canada.
Slamani, M., Kaminska, B., Analog Circuit Fault Diagnosis Based on Sensitivity Computation and Functional Testing, IEEE Design and Test of Computers, pp. 30-39, Mar. 1992.
Steven M. Sandler, “SMPS Simulation With Spice,” McGraw Hill, 1997, (entire book) pp. 1-187.
Lawrence G. Meares, Charles E. Hymowitz, “Simulating With Spice,” Intusoft, San Pedro, CA, 1988, (entire book) pp. 1-1 through 6-22 including appendix and index.
ICAP/4 IsSpice4 User's Guide, Version 8.1.0, Intusoft, 1988-1997, entire book, pp. 1-416.
Blakely , Sokoloff, Taylor & Zafman LLP
Craig Dwin M.
Intusoft
Knight Anthony
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