System and method of processing instructions for a processor

Details System and method of processing instructions for a processor System and method of processing instructions for a processor

1997-05-09

1998-11-24

Treat, William M.

395388, G06F 930

Patent

active

058419985

ABSTRACT:
A data processing system includes an instruction unit generating a program instruction. A parse unit coupled to the instruction unit receives the program instruction. The parse unit determines whether the instruction contains both load and store operations and generates first and second parcels for the instruction containing both load and store operations. A decode unit coupled to the parse unit receives the first and second parcels. The decode unit attaches an identification number to the first and second parcels, the identification number of the second parcel being determinable from the identification number of the first parcel. An issue unit coupled to the decode unit receives the first and second parcels. The issue unit issues the parcels to an instruction shelf, a load shelf, and a store shelf for instruction execution.

REFERENCES:
patent: 5748951 (1998-05-01), Webb et al.

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