System and method of filtering in an integration system

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

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C341S172000

Reexamination Certificate

active

06839011

ABSTRACT:
An improved method of filtering that can be used with an analog-to-digital converter (ADC) is disclosed herein. Multiple discrete-time-feedback-modules (114, 116) each with current limiting (202, 204and222, 224) are used to sample information which is supplied to an integrator (112) for conversion to digital form. By overlapping the integration of these samples, and by evaluating these integration results multiple times (TP2,TP3,TP4) per sample (TP1), using the methods disclosed herein the advantages of increased accuracy, lower power consumption and reduced cost may be realized.

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patent: 6140950 (2000-10-01), Oprescu
Friedel Gerfers et al., Implementation of a 1.5V Low-Power Clock-Jitter Insensitive Continuous-Time Modulator, IEEE, 0-7803-7448-7/02, pp. 652-655. Jul. 2002.

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